Approximate Computing leverages the intrinsic error resilience of applications to inaccuracy in their inner calculations, in order to achieve a required trade-off between efficiency, in terms of performance and power demanding, and acceptable error of returned results. In particular, for audio, image and video processing, data mining and information retrieval, approximate results turn out hard to distinguish from perfect ones. In recent years, Approximate Computing applicability is broadening and it has been representing a breakthrough in many scientific areas. Suitable solutions comes from approximate arithmetic operators, implemented both at hardware and software level, but from unreliable memory architectures, integrated circuit test, compilers and many others.

The aim of this workshop is the investigation of connections between AxC paradigm and the verification, the test and the reliability of digital circuits from two points of view:

1. how the approximate computing paradigm impacts the design and manufacturing flow of integrated circuits;

2. how the verification, testing and reliability disciplines can be exploited in the approximate computing paradigms.
The areas of interest include, but not limited to, the following topics:

- Modeling, specification, and verification of approximate circuits and systems
- Approximation induced error modeling and propagation
- Test and fault tolerance of approximate circuits and systems
- On-line test, monitoring and reconfiguration of approximate circuits and systems
- Dependability of approximate circuits and systems
- Applications and case studies
- Error Resilient Near-Threshold Computing
- Software-based fault tolerant technique for approximate computing
- Computing on unreliable hardware

Contributions: AxC’18 will feature oral presentation and posters, including a short introduction.

Publication: AxC’18 will distribute electronic format proceedings online on the workshop website. No formal proceedings will be available. Associated with the workshop, a special issue in a journal is planned.

Submission: to describe your contribution, please preferably submit a full paper up to six (6) pages. Extended abstract up to two (2) pages are also accepted. Both should be submitted in a standard IEEE format (you can find a template here). Further submission guidelines can be found on the workshop webpage.


*** General Chairs ***
Alberto Bosio, LIRMM (FR)
Mario Barbareschi, DIETI (IT)

*** Program Chair ***
Claus Braun, Stuttgart U (D)

*** Steering Committee ***
Jie Han, U Alberta (CA)
Sybille Hellebrand, Paderborn U (D)
Jörg Henkel, KIT (D)
Anand Raghunathan, Purdue U (USA)
Kaushik Roy, Purdue U (USA)
Adit Singh, Auburn U (USA)
Hans-Joachim Wunderlich, Stuttgart U (D)

*** Program Committee ***
Stefano Di Carlo, Politecnico di Torino (I)
Tong-Yu Hsieh, National Sun Yat-sen U (TW)
Marco Platzner, Paderborn U (D)
Paolo Rech, UFRGS (B)
Alessandro Savino, Politecnico di Torino (I)
Ernesto Sanchez, Politecnico di Torino (I)
Lukas Sekanina, Brno U (CZ)
Jürgen Teich, Erlangen-Nuremberg U (D)