posted by user: andrewjm33 || 3713 views || tracked by 3 users: [display]

IET CDT Nano SI 2008 : IET Computers & Digital Techniques Special Issue on Advances in Nanoelectronics Circuits and Systems

FacebookTwitterLinkedInGoogle

Link: http://www.ietdl.org/IET-CDT
 
When N/A
Where N/A
Submission Deadline Oct 6, 2008
Categories    computers digital techniques   nanoelectronics   circuits   systems
 

Call For Papers

IET Computers and Digital Techniques is seeking original and unpublished papers for a special issue titled "Advances in Nanoelectronics Circuits and Systems" to be published in early 2009. Alternative nanoarchitectures, design-space exploration, and fault tolerance have emerged as major challenges for nanoscale technologies. Extremely high defect rates are being predicted for nanoscale fabrication processes, both for top-down mask-based manufacturing and bottom-up self-assembly. Consequently, there is a need for innovative design solutions, architectures, and test methods. Recent years have seen significant growth in research on these topics, and a number of different research irections are currently being explored. This trend will continue in the near future and even more innovative solutions for improving yield, density, and reliability are expected to emerge.

The aim of this special issue is to bring together researchers to share recent results on various aspects of nanoarchitectures and nanoscale circuit/system design, with coverage ranging from architectural perspectives on nanotechnologies, circuit and system modeling, fault-tolerant design, to design for testability. The special issue will foster further research, thereby leading to the emergence of creative ideas and practical solutions. Some specific topics of interest, but not limited to, are:

- Alternative architectures and circuit/system design for nanoscale technologies
- Fault-tolerant design and nanoarchitectures for existing and emerging technologies.
- Design techniques to enhance yield and reliability.
- Modeling techniques for different nanotechnology devices and systems
- Case studies.
- Fault models, testing, and design for testability

Important dates:
Manuscript submission: October 6, 2008
Completion of first round of reviews: January 15, 2009
Submission of revised manuscripts: March 1, 2009
Notification of Acceptance: April 15, 2009
Special Issue publication: June, 2009

Guest Editors:
Bipul C. Paul
Toshiba America Research
bpaul@tari.toshiba.com

Krishnendu Chakrabarty
Duke University, USA
krish@ee.duke.edu

To submit a paper please go to
http://mc.manuscriptcentral.com/iet-cdt
and follow link to "submit"

Related Resources

SI: Model-Driven Performance Engg in CPS 2025   IET CPS Theory & Applications, Special Issue: Model-Driven System-Performance Engineering for CPS
VLSIA 2025   11th International Conference on VLSI and Applications
SI: ImmersiveEducation 2025   Computers & Education: X Reality (Elsevier Journal) - Special Issue on Immersive Learning: From Theory to Practice, Building Evidence-Based Frameworks
IJICS 2025   International Journal of Instrumentation and Control Systems
CompAuto--EI 2025   2025 4th International Conference on Computers and Automation (CompAuto 2025)
AISyS 2025   The Second International Conference on AI-based Systems and Services
SI - AI&Cyber - Applied Sciences (MDPI) 2025   Special Issue on Artificial Intelligence and Cybersecurity: Challenges and Opportunities
ICSNC 2025   The Twentieth International Conference on Systems and Networks Communications
ISCMI 2025   2025 12th International Conference on Soft Computing & Machine Intelligence (ISCMI 2025)
EXPLAINABILITY 2025   The Second International Conference on Systems Explainability