𝐍𝐎𝐂𝐒 2022
=========================================================
𝐂𝐚𝐥𝐥 𝐟𝐨𝐫 𝐏𝐚𝐩𝐞𝐫𝐬
16th IEEE/ACM International Symposium on Networks-on-Chip 
October 7 – 14, 2022, 𝐇𝐲𝐛𝐫𝐢𝐝 Conference (Shanghai, China)
(Co-located with Embedded Systems Week 2022)
https://nocs2022.github.io/

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The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, package-scale, chip-to-chip, and datacenter rack-scale communication technology, architecture, design methods, applications and systems.

NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including discrete optimization and algorithms, computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation.

𝐍𝐞𝐰 𝐢𝐧 𝐍𝐎𝐂𝐒'22 — 𝐉𝐨𝐮𝐫𝐧𝐚𝐥-𝐈𝐧𝐭𝐞𝐠𝐫𝐚𝐭𝐞𝐝 𝐏𝐮𝐛𝐥𝐢𝐜𝐚𝐭𝐢𝐨𝐧 𝐌𝐨𝐝𝐞𝐥: All accepted papers will be published in an IEEE Design & Test special issue.
Please visit https://nocs2022.github.io/ for more information.

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+ NoC Architecture and Implementation:
- Network architecture (topology, routing, arbitration)
- Timing, synchronous/asynchronous communication
- NoC reliability issues and solutions
- Power/thermal issues at NoC un-core and system-level
- Network interface issues and solutions
- Signaling and circuit design for NoC links and routers

+ Communication Analysis, Optimization, and Verification:
- NoC performance analysis and Quality of Service 
- Modeling, simulation, and synthesis of NoC
- Verification, debug and test of NoC
- NoC design and simulation methodologies and tools
- Benchmarks, experiences on NoC-based hardware
- Communication-efficient algorithms
- Communication workload characterization & evaluation 

+ Emerging and Novel NoC Technologies:
- Optical, wireless, CNT, and other emerging technologies
- NoC for 2.5D and 3D packages
- Package-specific NoC design
- Network coding and compression solutions
- Approximate computing for NoC and NoC-based systems

+ NoC for High-Performance Computing (HPC) Systems:
- NoC design for Deep Learning
- Mapping of emerging applications and systems onto NoC 
- NoC case studies, application-specific NoC design
- NoC for FPGA, structured ASIC, CMP and MPSoC 
- NoC designs for heterogeneous systems
- NoC for CPU-GPU and data-center-on-a-chip (DCoC)
- Scalable modeling of NoC
- Machine learning for NoC and NoC-based Systems

+ NoC at the Un-Core and System-level:
- Design of memory subsystem (un-core) including memory controllers, caches, cache coherence protocols in NoC
- NoC for new memory/storage technologies
- NoC support for processing-in-memory
- OS support for NoC
- Programming models for NoCs
- Interactions between large-scale systems (datacenter, edge and fog computing) and NoC-based building blocks

+ Inter/Intra-Chip and Rack-Scale Network:
- Unified inter/intra-chip networks
- Hybrid chip-scale and datacenter rack-scale networks
- All aspects of inter-chip and rack-scale network design

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Organization Committee
General Chairs:
Sergi Abadal (Universitat Politècnica de Catalunya)
Joshua San Miguel (University of Wisconsin)

Technical Program Chairs:
Miquel Moreto (Universitat Politècnica de Catalunya)
Mahdi Nikdast (Colorado State University)

Steering Committee Chair:
Radu Marculescu (University of Texas, Austin)

Publicity Chairs:
Jieming Yin (Lehigh University, North America)
Poona Bahrebar (Ghent University, Europe)
Trevor Carlson (National University of Singapore)

Web Chair:
Salvatore Monteleone (Niccoló Cusano University)

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Important Dates
Abstract Registration: April 29, 2022
Full-paper Submission: May 6, 2022
First Notification and Reviews: July 8, 2022
Submission of Revised Papers: July 29, 2022
Final Notification of Acceptance: August 19, 2022