The 38th IEEE/SBC Symposium on Computer Architecture and High Performance Computing will take place from October 14 to 16 at Madrid, Spain.

SBAC-PAD is an annual international conference series, which presents the latest trends, current research and developments, and novel tools and applications in the fields of Computer Architecture, High-Performance Computing, and Parallel and Distributed Computing technologies. SBAC-PAD is open to industry, faculty, researchers, practitioners, and undergraduate and graduate students from around the world. Its scientific program is composed of high-quality submitted papers, selected by a thorough peer review process, and invited talks from renowned researchers.

Important dates

- Abstract submission deadline: July 1st, 2026 (AoE)
- Paper submission deadline: July 9th, 2026 (AoE)
- Rebuttal period: July 15th - 27th, 2026
- Author notification: August 3rd, 2026
- Camera-ready submission: September 5th, 2026

Tracks

Authors are invited to submit original manuscripts to one of six tracks that address challenges in any of the following areas related to the fields of Computer Architecture (CA) and High-performance and Distributed Computing (HPDC).

Track 1 - System Software: Focuses on the design, implementation, and optimization of operating systems, compilers, runtimes, and middleware for high-performance, parallel, and distributed computing environments. Topics include virtualization, scheduling, resource management, and programming support for emerging architectures.

Track 2 - Computer Architecture: Covers advances in processor, memory, interconnect, and accelerator design, including GPUs, FPGAs, and near-data processing. This track also welcomes contributions on reconfigurable, energy-efficient, resilient, and secure architectures for modern computing systems.

Track 3 - Distributed Systems, Networking and Storage: Explores scalable distributed infrastructures such as clouds, clusters, and edge/fog systems. It also includes work on networking technologies, data management, storage systems, and I/O frameworks for data-intensive and high-throughput workloads.

Track 4 - Parallel Applications and Algorithms: Dedicated to the development and analysis of parallel and distributed algorithms, programming models, and real-world scientific and engineering applications. Submissions addressing performance, scalability, and resilience on modern architectures are particularly encouraged.

Track 5 - Performance Evaluation: Focuses on benchmarking, modeling, simulation, and analytical methods for evaluating and predicting the performance of hardware and software systems. Topics include power-aware and predictive performance models, as well as tools for profiling and optimization.

Track 6 - Parallel and Distributed Computing for AI and Data Analytics: Encompasses AI and machine learning methods applied to computer architecture and high-performance computing, as well as the use of HPC for AI workloads. It also includes tools, frameworks, and data-driven approaches that enhance productivity and insight in large-scale computing environments.

The program committee will select the top-ranked papers as finalists, and one paper will be selected during the conference as the Best Paper.

Paper guidelines

Paper submissions must be in English, have 10 pages maximum (excluding the references), and follow the IEEE conference manuscript formatting guidelines for double-column text using a single-spaced 10-point font on 8.5 × 11-inch pages. Templates are available from http://www.ieee.org/conferences/publishing/templates.html. Papers that do not meet these requirements might be rejected without a review. To be published in the conference proceedings and to be eligible for publication at the IEEE Xplore, one of the authors must register at the full rate and present his/her work at the conference.