The System Level Interconnect Prediction (SLIP) Workshop focuses on modeling and prediction of usable properties of optimized interconnect systems and their impact on system performance. Both theory and applications of interconnect prediction techniques are highlighted, with emphasis on applications to architectural and micro-architectural exploration, physical design, interconnect technology planning and communication networks. In addition to the presentation of state-of-the-art papers in these fields, invited talks and tutorials by leading researchers aim to encourage dialogue between the architecture, physical design, and interconnect technology communities.

Paper submission deadline: December 7, 2007

Scope

Interconnect prediction methodology:

- Statistical properties of complex interconnect systems

- Techniques and calibrations for "Rentian" and "non-Rentian" interconnect estimation

- A priori, on-line, and a posteriori estimation of interconnect design parameters (wire length, area, power, delay, etc.)

Applications in system design:

- Interconnect parameter and yield estimation for use in architecture design and CAD

- Interconnect planning flows for specific objectives (e.g., low power, high performance) or target technologies (e.g., ASIC/SoC, FPGA, System-in-package, 3-D integration, molecular/nanoelectronics)

Applications in technology evaluation:

- Interconnect technology prediction for long-term industry roadmap projections

- Early (predictive) evaluation of novel interconnect technologies in a system's context

- Architectural and micro-architectural effects of interconnect optimization approaches



Authors are invited to electronically submit papers of up to 8 pages in ACM proceedings format by following the instructions at http://www.easychair.org/SLIP08. Proposals for special sessions are also welcomed, and should be directed to the Special Sessions Chair. The proceedings of SLIP 2008 will be published by ACM Press; we anticipate that a special issue of a major journal will be devoted to expanded versions of the best symposium papers. SLIP 2008 will be co-located with and immediately precede the 2nd ACM/IEEE International Symposium on Networks-on-Chip (http://async.org.uk/nocs2008) and the 14th IEEE International Symposium on Asynchronous Circuits and Systems (http://async.org.uk/async2008). More details about SLIP 2008, including submission guidelines, travel funding sources, and travel information can be found online at: