The 14th Electronics Packaging Technology Conference (EPTC 2012) is an International event organized by the IEEE Reliability/CPMT/ED Singapore Chapter and sponsored by IEEE CPMT Society.

EPTC 2012 will feature technical sessions, short courses/forums, an exhibition, social and networking activities. It aims to provide a good coverage of technological developments in all areas of electronic packaging from design to manufacturing and operation. It is a major forum for the exchange of knowledge and provides opportunities to network and meet leading experts in the field.

Since its inauguration in 1997, EPTC has developed into a highly reputed electronics packaging conference in Asia and is well attended by experts in all aspects related to packaging technology from all over the world.

Conference Topics
You are invited to submit an abstract, presenting new development in the following categories:

•Advanced Packaging: Flip chip packaging, Wire-bond packaging, Embedded passives & actives on substrates, 3D System in Packaging.
•Wafer Level Packaging : Wafer level packaging (Fan-in, Fan-out), 3D integration, Through Silicon Via, Silicon interposer.
•Interconnection Technologies: Wire bonding technology, Solder bump technology, solder alternatives (ICP, ACP, ACF, NCP), and TSV.
•Emerging Technologies: Packaging technologies for MEMS, Biomedical, Optoelectronics, Photo voltaic, Printed electronics, Wearable electronics etc.
•Materials & Processes: Materials and processes for traditional and advanced microelectronic systems, 3D packages, MEMS, solar, green and biomedical packaging
•Electrical Modeling & Simulations: Power plane modeling, signal integrity analysis of substrate/package
•Mechanical Modeling & Simulations: Thermo-mechanical / Structural / Moisture modeling, solder/metal fatigue, vibration, drop impact, etc.
•Thermal Characterization and Cooling Solutions: Thermal modeling and simulation, component and system level thermal management and characterization
•Quality & Reliability: Component, board and system level reliability assessment, interfacial adhesion, accelerated testing, failure characterization, etc.
•Wafer/Package Testing and Characterization: High-speed test architectures and systems, test methodologies, probe card design