The shift to multi-core computing has increased the relevance of parallel programming paradigms such as transactional memory. On the other hand, semiconductor technology scaling is getting close to atomic scale, causing reliability issues and making dependability a first-class design constraint. The DMTM workshop, co-organized by the COST Actions Euro-TM (http://www.eurotm.org) and MEDIAN (http://www.median-project.eu), aims to bring together these two relevant and timely topics. While papers covering both Transactional Memory and Dependability are ideal, we welcome papers in only one of the two topics as well. To facilitate later submissions, and to facilitate discussion during the workshop.


Topic of Interest

· Hardware and software techniques to enhance dependability of multi-core systems and parallel applications

· Transactional Memory (TM) and its applications for failure-isolation, failure-atomicity and real-time systems

· Methodologies and tools for the development of concurrent applications for embedded systems

· Correctness, performance, testing and debugging of TM and multi-core applications

· Hardware, OS and language supports for TM and other programming paradigms for concurrent programming

· Energy/reliability/performance tradeoffs

· Fault-Tolerant micro-architectures and parallel system architectures

· Compiler/architecture/OS methodologies and strategies for reliability

· Error modeling, detection, correction, and tolerance for transient and permanent errors in multi-core architectures

· Reliable on-chip communications