The International Symposium on Asynchronous Circuits and Systems is the premier forum for researchers to present their latest findings in the area of asynchronous design. Authors are invited to submit full papers on any aspect of asynchronous design, ranging from the core topics of design, synthesis and test, to asynchronous applications in system-level integration and emerging computing technologies. Topics of interest include, but are not limited to:


- CAD tools for asynchronous design, synthesis, analysis and optimization
- Asynchronous/mixed-timed circuits, architectures, memories and interfaces
- Physical design of asynchronous logic and pipelines
- Formal methods for correctness, and performance/power analysis
- Test, reliability, security, and radiation tolerance
- Asynchronous variability-tolerant design and design for manufacturing
- Motivating case studies, comparisons, and applications
- Embedded system design with asynchronous architectures/implementations
- Design models and methods for asynchronous buses, networks on chip (NoC) and system-on-chip (SoC) interconnects
- Elastic and latency-tolerant synchronous design and GALS systems
- Asynchrony in emerging technologies, including genetic, neural, nano and quantum computing



Papers should not exceed ten pages in IEEE double-column format, and should be submitted via the conference web site (the submission link will open soon). Papers will be evaluated by the program committee on the basis of scientific merit, innovation, relevance, and presentation. New-idea papers are encouraged. Accepted papers will be published in an IEEE proceedings. Please monitor this website regularly for up-to-date information: