Organizing Chairs:

Ramesh Illikkal (Intel) ramesh.g.illikkal@intel.com

Ravi Iyer (Intel) ravishankar.iyer@intel.com


Overview
The computer industry is witnessing an inflection point – ‘Internet of Things combined with Cloud Analytics’ –which has implications from end (sensor devices) to end (cloud architectures). Many technologies come together contributing to this major inflection point: Computing platforms getting smaller (e.g. handheld devices, wearables), richer (e.g. image and language understanding) and broader (i.e. reaching the masses via Internet of Things). Sensors operating in constrained environments connected through intelligent gateways and cloud backend creates a very complex environment for the operators, system integrators, and developers of this new emerging technology. Discovering and managing sensor devices; collecting, cleaning and storing discoverable data; normalizing, aggregating and analyzing the data for insights and actions; managing the security and privacy of the data, enforcing the access privileges and trusted execution environments – all these are required to make this revolution happen.

The research challenges in IoT platforms are multi-fold: (a) providing rich functionality and wider power/performance range for sensor devices (b) attempting to cover a broad range of applications that can be migrated from cloud to gateways and sensor devices, (c) enabling a scalable and modular cloud architecture that provides the required real-time and uptime capabilities and (d) providing a rich software programming environment that eases the challenge of developing applications on end to end platforms consisting of elements ranging from sensors to gateways to cloud. The goal of this workshop is to bring together academic researchers and industry practitioners to discuss future IoT sensor-to- cloud architectures including sensors, gateways and cloud architectures.

Below is the proposed list of topics for the workshop. Topics include, but are not restricted to, the following:

Sensors, Actuators, Gateway & Controllers Architectures

– Architectures for wearable and IOT devices
– Heterogeneity in Cores, Frequency, Cache, Memory
– Power, Performance, Energy optimizations
– SoCs, CPU/GPU, CPU/GPGPU architectures
– Ultra-Low Power Core Micro-architectures
– Fabrics / Network-on-chip, Cache/Memory Hierarchies
– HW Support for Heterogeneity, Programmability, Modularity
– Simulation / Emulation Methodologies
– Protocols and abstraction layers (MQTT, CoAP, REST, …)

Cloud Architecture

– Data Center Architectures for IoT; customization and specialization
– Edge/Fog computing – Dynamic Cloud-gateway-device offloads
– Workload/Algorithm Partitioning between Heterogeneous Cores and Accelerators
– BigData Frameworks (Hadoop, Spark, Flink, …)
– Heterogeneous Datacenters (FPGA, GPU, Accelerators, …)
– Machine Learning Algorithms & Applications, Graph processing, Deep Neural Networks
– Batch, streaming and distributed Analytics
– Design Patterns and Application Programming frameworks

Emerging Workloads and Use cases

– Wearable and IOT use cases and workloads
– Speech/Image recognition and understanding, Cognitive computing
– Personal Assistants, Predictive/Prescriptive Analytics, Robotics
– Workload Analysis for power/performance/energy optimization and acceleration
– Performance Monitoring and Simulation, Architecture analysis

Novel Accelerator Designs

– Specialized Accelerator Architectures and Designs
– Machine Learning, Neural Network and Graph Processing accelerators
– Domain-Specific Programmable/Configurable Accelerators
– Accelerator Interfaces for Programmability
– Development Environments for Accelerator Design



Submission Guidelines: Interested authors are encouraged to submit extended abstracts (1 – 2 pages) or short papers (6 pages) by email to the organizing chairs. The deadline for submission is December 16, 2016. Final (short) papers will be due on Jan 16, 2017.