The overwhelming increased demand for both storage and computation necessitates revisiting the traditional memory subsystems used in processors and storage systems to take advantage of emerging memory technologies. The promising features of emerging memory technologies such as low power consumption, increased performance, less susceptibility to particle strikes, and higher bit density have prompted researchers to seek new organizations in the different memory-hierarchy levels, to propose circuitries and algorithms to improve performance and reduce power consumption, and to develop new schemes to enhance system reliability. While performance and power are the major motivations to revisit memory organization in cache hierarchy of modern processors, several contributing factors such as endurance, reliability, power, throughput, and cost are major concerns in storage subsystems and solid-state drives (SSDs). Design refinement techniques in both processors and storage systems can span different computer system abstractions including circuit design, micro-architectural techniques, system architecture, and operating system level. This special section of IEEE Transactions on Computers seeks original research papers in two major tracks:

1. Emerging uses of memory technologies in processor architectures, essentially focusing on the following non-exhaustive set of topics:
- Innovative cache designs using emerging non-volatile memories
- Architectures for emerging memory technologies
- Operating system and compiler support for emerging memory technologies
- Reliability challenges of emerging non-volatile memories in computer systems
- Dependable architectures using emerging non-volatile memories
- Novel applications of non-volatile memories in memory hierarchies
- Signal processing and coding for emerging non-volatile memories in computer systems
- Security issues of emerging non-volatile memories

2. Emerging uses of memory technologies in storage systems, essentially focusing on the following non-exhaustive set of topics:
- Architectures and data management policies for hybrid storage systems
- Operating system support and file systems for emerging memory technologies
- Reliability challenges of emerging non-volatile memories in storage systems
- Emerging memory technologies for high-performance RAID arrays
- Signal processing and coding for emerging non-volatile memories in storage systems
- Application of emerging non-volatile memories in very large scale storage architectures
- Erasure codes for emerging non-volatile memories in storage systems
- Power-efficient techniques for hybrid storage systems


Important Dates

Submission Deadline: February 3, 2014
First Round of Publishing Decisions: April 15, 2014
Revised Papers Submission: May 15, 2014
Final Round of Decisions: July 15, 2014
Final Papers: September 15, 2014
Publication (tentative): Early 2015


Guest Editors

Hossein Asadi
Sharif University of Technology, Iran
asadi@sharif.edu

Paolo Ienne
École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
paolo.Ienne@epfl.ch

Hamid Sarbazi-Azad
Sharif University of Technology, Iran
azad@sharif.edu


Submission Instructions

All submissions must be original and have not been published or under review elsewhere. Detailed submission instructions are available at https://mc.manuscriptcentral.com/tc-cs.