In early design stages, software and platform developers work with abstractions of the hardware in the form analytical models, simulators, or estimators for, e.g., communication bandwidth, heat propagation, voltage and frequency scaling and control, etc.
These abstractions are utilized to verify the correctness of software algorithms, predict their potential behavior, e.g., performance, energy, temperature, in an actual environment, and take design decisions accordingly.
A crucial issue is the difficulty in assessing the fidelity of the abstract platform model versus the real platform. The challenge when conceiving and refining such abstraction is to ensure that: (1) models are reasonably accurate with respect to the real platform, (2) the final platform is indeed an implementation of the model, and the properties verified or predicted at the model level are also satisfied by the implementation.

The workshop is interested in practical validation and demonstration of high-level design models in areas including, but not limited to:
(1) prediction and estimation models, e.g., performance, power, temperature,
(2) faithful simulators of entire-systems,
(3) tool-flows that address the entire design stack all the way to final implementation,
(4) platform controlling software,
(5) tools to analyze software source code to extract models,
(6) tools generating software for checking model properties on the implementation
such as assertions, invariant verification, trace analysis, etc.

We seek contributions that can demonstrate efficient results on actual platforms, such as test-chips, FPGA, or state-of-the-art SoCs.
The submissions should explicitly highlight their methods and techniques that ensure the faithfulness of abstract platform models against real hardware. The workshop aims to provide a forum where participants from academia and industry can exchange mature knowledge and insights.

Event format:
The workshop features keynotes, regular papers presentations, and practical demonstrations.
We will have two invitation-based keynotes, one industrial and one academic speaker.
Submissions for regular papers are limited to 10 pages, LNCS format, and should comprise of two parts.
The first should describe the method, model, or tool presented.
The second should explain how the validation will be carried out and what is its outcome (including case-studies and detailed analysis).
None of the two parts should be smaller than 4 pages. The authors of the best papers will be invited for a practical paper, at least one author is expected to register, attend the workshop, and present the paper.
Note, the papers presented at the workshops are not included in the DATE proceedings.
The organizing committee aims to publish the accepted papers in a volume of post-proceedings (LNCS) or in a special journal issue. For example, the papers accepted at MiFI'15 last year will be included in a Springer book.

Papers must be submitted online via EasyChair:
https://easychair.org/conferences/?conf=mifi2016

Important dates:
Abstract submission deadline: December 1.
Paper submission deadline: December 8.
Notification of acceptance: January 8.
Camera ready manuscripts: January 28.

General chairs:
Anca Molnos, CEA-LETI, France.
Christian Fabre, CEA-LETI, France

Technical program committee:
Saddek Bensalem, University of Grenoble, France
Kees Goossens, Eindhoven University of Technology, Netherlands
Koji Inoue, Kyushu University, Japan
Vania Joloboff, INRIA, France, East China Normal University, China
Eugenio Villar, University of Cantabria, Spain
Suzanne Lesecq, CEA-LETI, France
Soheil Ghiasi, University of California, Davis