IEEE International High Level Design Validation and Test Workshop aims to stimulate research in test and validation methodologies for ICs and systems specified using high level descriptions, where high level refers to register-transfer, behavioral, and system level. The goal of the workshop is to provide an informal forum, bringing together designers and test and verification researchers working in validating, debugging, synthesizing, and testing designs specified using high level descriptions, in an effort to address high level design, validation, and test issues concurrently.